March 1-3, Naples, Italy

PDP 2023

31st Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

Parallel, Distributed, and Network-Based Processing

Parallel, Distributed, and Network-Based Processing has undergone impressive change over recent years. New architectures and applications have rapidly become the central focus of the discipline. These changes are often a result of the cross-fertilization of parallel and distributed technologies with other rapidly evolving technologies. Therefore, reviewing and assessing these new developments is paramount compared with recent research achievements in the well-established areas of parallel and distributed computing from industry and the scientific community. PDP 2023 will provide a forum for presenting these and other issues through original research presentations and will facilitate the exchange of knowledge and new ideas at the highest technical level.

The Call for Papers is available here.

About Euromicro

Euromicro is an international scientific organization advancing sciences and applications of Information Technology and Microelectronics. A significant focus is organizing conferences and workshops in Computer Science and Computer Engineering. Euromicro is a non-profit association founded in 1974, and annual meetings have taken place in more than 20 countries all over Europe. Find out more

Conference Starts in:

Call for Papers

Parallel, Distributed, and Network-Based Processing has undergone impressive change over recent years. New architectures and applications have rapidly become the central focus of the discipline. These changes are often a result of the cross-fertilization of parallel and distributed technologies with other rapidly evolving technologies. Therefore, reviewing and assessing these new developments is paramount compared with recent research achievements in the well-established parallel and distributed computing areas from industry and the scientific community. PDP 2022 will provide a forum for presenting these and other issues through original research presentations and will facilitate the exchange of knowledge and new ideas at the highest technical level. Topics of interest include, but are not restricted to:

Parallel Computing: massively parallel machines; embedded parallel and distributed systems; multi- and many-core systems; GPU and FPGA-based parallel systems; parallel I/O; memory organization.

Distributed and Network-based Computing: Cluster, Grid, Web, and Cloud computing; mobile computing; interconnection networks.

Big Data: large-scale data processing; distributed databases and archives; large-scale data management; metadata; data-intensive applications.

Programming models and Tools: programming languages and environments; runtime support systems; performance prediction and analysis; simulation of parallel and distributed systems.

Systems and Architectures: novel system architectures; high data throughput architectures; service-oriented architectures; heterogeneous systems; shared-memory and message-passing systems; middleware and distributed operating systems; dependability and survivability; resource management.

Advanced Algorithms and Applications: distributed algorithms; multi-disciplinary applications; computations over irregular domains; numerical applications with multi-level parallelism; real-time distributed applications.

Important dates

  • Deadline for paper submission: November 30 December 11, 2022
  • Acceptance notification: January 22, 2022
  • Camera-ready paper due: January 31, 2023
  • Registration open: February 1, 2023
  • Early registration until February 17, 2023
  • Conference: March 1 – 3, 2023

Submission of Papers

Prospective authors should submit a full paper not exceeding 8 pages in the IEEE Conference proceedings format (IEEEtran, double-column, 10pt) to the conference main track or the Special Sessions through the EasyChair submission system (see link below) indicating the Main Track or the chosen Special Session. The submission period will open on July 31st.
  • Double-blind review: the paper should not contain authors’ names and affiliations; in the reference list, references to the authors’ work entries should be substituted with the string “omitted for blind review”.
  • Publicationall accepted papers will be included in the same proceedings volume published by Conference Publishing Services (CPS). The Final Paper Preparation and Submission Instructions will be announced after the notification of acceptance. Authors of accepted papers are expected to register and present their papers at the Conference. Conference proceedings will be submitted for indexing, among others, to DBLP, Scopus ScienceDirect, and ISI Web of Knowledge.

Journal Special Issue

Selected papers will be invited to submit an extended version to a special issue in the selected JCR-indexed journal Microprocessors and Microsystems (Elsevier).

Instructions for authors of accepted papers

IMPORTANT DATES: These are hard deadlines. Please let us know if you will have any problems meeting them:
  • Camera-ready: January 31th
  • IEEE Copyright transfer: February 17th
  • Video with presentation and presenter info: February 17th
  • Early registration until: February 17th
  PROCEEDINGS The paper will be published in the Conference Proceedings subject to the following:
  1. Upload of a camera-ready version complying with the final manuscript format requirements and the following page limits:

    Full paper: Maximum of 8 pages; additional pages are charged with 60 Eur. per extra page (up to 2 additional pages)

    Short paper: Maximum of 4 pages; an additional page can be included with a charge of 60 Eur.

  2. Full consideration of reviewers’ remarks and suggestions for the elaboration of the camera-ready version
  3. Provide the following required extra material: Fulfilled IEEE copyright transfer form; information about the presenter, including plain text with a short bio and a photograph.
  4. Full registration of at least one of the authors of each manuscript
  5. Provide a video recording of your presentation in MP4 format, of no more than 15 minutes (full paper) or 10 minutes (short paper), and a maximum of 50 MB
  6. Participate in the online session during the conference to answer questions and provide live feedback about your work to the audience.
SUBMIT DOCUMENTATION AND EXTRA INFORMATION The following documentation should be provided to the organization by the indicated deadlines:
  1. Camera-ready: The final version of the paper should be uploaded to the EasyChair platform as a new version of the same submission.
  2. Copyright form: Authors will timely receive instructions to fulfill the IEEE copyright transfer form.
  3. Video with presentation and presenter info: upload your video presentation to any platform that provides you with a public link to download it. Send an email with the link along with the short bio and photo of the presenter to with the subject “[PDP 2023] Video and presenter info, paper ID”, substituting ID by the number of the paper assigned in the EasyChair platform.
REGISTRATION Please note that at least one of the originally submitting authors of an accepted paper has to fully register for the conference (i.e., with Euromicro member fee or with Euromicro non-member fee) until Friday, February 17th, 2023. This date is also the deadline for getting the early registration fee. Otherwise, the paper will not be included in the Proceedings. Check the Registration page.

Registration is available from €430. Join us in Naples on 1-3 March and be part of the change!

Registration Fees

The registration procedure is managed by the Euromicro web portal.

NON member - early registration


Euromicro member - early registation


Euromicro member - late registration


NON member - late registation


Conference Schedule

PDP 2023 full schedule of keynotes, sessions & workshops will be available soon

8:00AM - 9:00AMMAIN HALL

Welcome and Registration

Registration for PDP 2023. Pick up your name badge and goodie bag.


Plenary session

Parallel session

Parellel session 1

Parallel session

Parellel session 2

Parallel session

Parellel session 3
10:30AM - 11:00AMSALA WAGNER

Coffee Break

Italian coffee, juices and pastries.    


Buffet lunch with Italian specialties.    

Coffee Break

Italian coffee, juices and pastries.    


Plenary session
10:30AM - 11:00AMSALA WAGNER

Coffee Break

Italian coffee, juices and pastries.    


Buffet lunch with Italian specialties.    

Coffee Break

Italian coffee, juices and pastries.    

Social Dinner



Plenary session
10:30AM - 11:00AMSALA WAGNER

Coffee Break

Italian coffee, juices and pastries.    


Buffet lunch with Italian specialties.    

Coffee Break

Italian coffee, juices and pastries.    

Keynote Speakers

Well known industry leaders and emerging talents

  • Pasqua


    Senior Research Scientist (National Research Council)

  • Brendan


    Head of Developer Relations (HPC Engineering)

  • Ejarque Artigas


    Ejarque Artigas

    Senior Research Engineer (Barcelona Supercomputing Center)

  • Coviello



    Researcher in Integrated Systems (NEC Labs America)

Special Sessions

The following Special Sessions will be part of PDP 2023

HPCMS intent is to offer an opportunity to express and confront views on trends, challenges, and state-of-the art in diverse application fields, such as engineering, physics, chemistry, biology, geology, medicine, ecology, sociology, traffic control, economy, etc.

Topics of interest include, but are not limited to:

  • High-performance computing in computational science: intra-disciplinary and multi-disciplinary research applications;
  • Complex systems modeling and simulation;
  • Cellular Automata, Genetic Algorithms, Neural networks, Swarm Intelligence implementations;
  • Integrated approach to optimization and simulation;
  • MPI, OpenMP, GPGPU applications in Computational Science;
  • Optimization algorithms, modelling techniques related to optimization in Computational Science;
  • High-performance Software developed to solve science (e.g., biological, physical, and social), engineering, medicine, and humanities problems;
  • Hardware approaches of high performance computing in modeling and simulation.

As for previous editions, organizers of the HPCMS session are planning a Special Issue of an important international ISI Journal, based on distinguished papers that will be accepted for the session. For instance, a selected number of papers of the past workshop editions have been published on the ISI Journals “Journal of Parallel and Distributed Computing”, “International Journal of High Performance Computing Applications” and “Concurrency and Computation: Practice and Experience”



Program Committee

For the next decade, Moore’s Law is still going to bring higher transistor densities allowing Billions of transistors to be integrated on a single chip. However, it becomes obvious that exploiting significant amounts of instruction-level parallelism with deeper pipelines and more aggressive wide-issue superscalar techniques, and using most of the transistor budget for large on-chip caches has come to a dead end. Especially, scaling performance with higher clock frequencies is getting more and more difficult because of heat dissipation problems and too high energy consumption. The latter is not only a technical problem for mobile systems, but is even going to become a severe problem for computing centers because high energy consumption leads to significant cost factors in the budget. For the moment, improving performance can only be achieved by exploiting parallelism on all system levels. Multicore architectures like Graphics Processing Unit (GPU) offer a better performance/Watt ratio than single core architectures with similar performance. Combining multicore and coprocessor technology promises extreme computing power for highly CPU-time-consuming applications like in image processing. The Special Session on GPU Computing and Hybrid Computing aims at providing a forum for scientific researchers and engineers on hot topics related to GPU computing and hybrid computing with special emphasis on applications, performance analysis, programming models and mechanisms for mapping codes.

Topics of interest include, but are not limited to:

  • GPU computing, multi GPU processing, hybrid computing;
  • Programming models, programming frameworks, CUDA, OpenCL, communication libraries;
  • Mechanisms for mapping codes;
  • Task allocation;
  • Fault tolerance;
  • Performance analysis;
  • Applications: image processing, signal processing, linear algebra, numerical simulation, optimisation;
  • Domains: computer science, electronic, embedded systems, telecommunication, medical imaging, finance.


Programme Committee:

Heterogeneity is emerging as one of the main characteristics of today’s and future HPC environments where different node organizations, memory hierarchies, and kinds of exotic accelerators are increasingly present. It pervades the entire spectrum of Computing Continuum, ranging from large Cloud infrastructures and Datacenter up to the Internet of Things and Edge Computing environments, aimed at making available in a transparent and friendly way the multitude of low-power and heterogeneous HPC resources available everywhere around us. In this context, for Computational Science and Machine Learning, it is essential to leverage efficient and highly scalable libraries and tools capable of exploiting such modern heterogeneous computers. These systems are typically characterized by very different software environments, which require a new level of flexibility in the algorithms and methods used to achieve an adequate level of performance, with growing attention to energy consumption. This conference Special Session aims to provide a forum for researchers and practitioners to discuss recent advances in parallel methods and algorithms and their implementations on current and future heterogeneous HPC architectures. We solicit research works that address algorithmic design, implementation techniques, performance analysis, integration of parallel numerical methods in science and engineering applications, energy-aware techniques, and theoretical models that efficiently solve problems on heterogeneous platforms.

We focus on papers covering various topics of interest that include, but are not limited to, the following:

  • Tools and programming environments support different forms of parallelism.
  • Heterogeneous algorithms for dense and sparse numerical linear algebra
  • Heterogeneous algorithms for optimization and non-linear problems
  • Applications of heterogeneous numerical algorithms in science and engineering
  • Analysis methods for large data sets
  • Multi/Many-cores and GPU tools for the parallel solution of large-scale problems
  • Performance and scalability models
  • Energy-aware algorithms
  • Auto-tuning techniques for heterogeneous and parallel environments
  • Multi-level cache management
  • Task scheduling and load balancing among heterogeneous computing elements
  • HPC on low-power devices
  • Integration of Cloud/Fog/Edge computing techniques and tools


Programme Committee:

Cloud Computing covers a broad range of distributed computing principles from infrastructure (e.g distributed storage, reconfigurable networks) to new programming platforms (e.g MS Azure, Google Appe Engine), and internet-based applications. Particularly, Infrastructure as a Service (IaaS) Cloud systems allow the dynamic creation, destruction and management of virtual machines (VMs) as part of virtual computing infrastructures. IaaS Clouds provide a high-level of abstraction to the end user, one that allows the creation of on-demand services through a pay as you go infrastructure combined with elasticity. The increasingly large range of choices and availability of IaaS toolkits has also allowed creation of cloud solutions and frameworks even suitable for private deployment and practical IaaS use on smaller scales.

This special session on Cloud Computing is intended to be a forum for the exchange of ideas and experiences on the use of Cloud Computing technologies and applications with compute and data intensive workloads. The special session also aims at presenting the challenges and opportunities offered by the development of open-source Cloud Computing solutions, as well as case studies in applications of Cloud Computing.

Authors are invited to submit original and unpublished research in the areas of Cloud Computing, Fog/Edge, Serverless and Distributed Computing. With the rapid evolution of newly emerging technologies, this session also aims to provide a forum for novel methods and case studies on the integrated use of clouds, fogs, Internet of Things (IoT) and Blockchain systems. The general venue will be a good occasion to share, learn, and discuss the latest results in these research fields. The special session program will include presentations of peer-reviewed papers.

Topics of interest include, but are not limited to:

  • Cloud Computing for scientific, compute and/or data intensive applications;
  • Virtual Machine scheduling and management algorithms;
  • Operational challenges, federative and interoperability aspects of IaaS systems;
  • Virtual machine/container image and virtual appliance storage management (e.g., caching, repositories, marketplaces);
  • Virtualization and container technologies and their effects on IaaS solutions;
  • Programming models, tools, orchestration techniques, applications, and workflows involving Cloud and IoT systems;
  • Cloud, Edge and Fog services for the Internet of Things;
  • Cloud, Edge, and Fog services for enhanced Blockchain infrastructures;
  • Performance evaluation, modelling, simulation, and prediction of integrated cloud, fog, blockchain and IoT systems;
  • Scalability issues of IoT-Fog-Cloud systems;
  • Security and Privacy aspects of data management in clouds, fogs, blockchain and IoT systems.


Programme Committee:

Recently, we are witnessing the growth of Internet-connected devices processing at an incredible pace. Devices that need to be “always-on” for accessing data and services through the network. This massive set of devices generates a lot of pressure on the computing infrastructure that is called to serve their requests. This is particularly critical when focusing on the so-called next-generation applications (NextGen), i.e., those applications characterized by stringent requirements in terms of latency, data, privacy, and network bandwidth. Such a “pressure” stimulates the evolution of classical Cloud computing platforms towards a large-scale distributed computing infrastructure of heterogeneous devices, forming a continuum from the Cloud to the Edge of the network.

This complex environment is determining a paradigm switch in the organization of computing infrastructures, moving from “mostly-centralized” to “mostly-decentralized” installments. Rather than relying on a traditional data center compute model, the notion of a compute continuum is gaining momentum, exploiting the right computational resources at optimal processing points in the system.

In the traditional cloud model, enterprise data is directed straight to the cloud for processing, where most of the heavy compute intelligence is located. But, in the transformative data-driven era we live in, this is increasingly not a viable long-term economic model due to the volume of data and a new emphasis on security, safety, privacy, latency, and reliability.

Today, data insights drive near real-time decisions directly affecting the operation of factories, cities, transportation, buildings, and homes. To cope, computing must be fast, efficient, and secure, which generally means putting more compute firepower closer to the data source. It builds the case for more on-device endpoint computing, more localized computing with a new breed of network and private edge servers, and sensible choices over which workloads need to remain in cloud data centers.

The cradle of this special session has been the focus group on the compute continuum that is part of the Italian National Laboratory on “High-Performance Computing: Key Technologies and Tools”, from which this initiative stems. Starting there, the special session aims to bring together experts from academia and industry to identify new challenges for the management of resources in cloud-edge infrastructures and promote this vision to academia and industry stakeholders.

Topics of interest include, but are not limited to:

  • (near-) real-time service management across the compute continuum application models for next-generation continuum-based applications
  • continuum services allocation and orchestration
  • trusted and federated Cloud-Fog-Edge-IoT infrastructures
  • efficient data management and interoperable systems in the compute continuum
  • Mobile Edge Computing
  • Machine Learning for energy saving, scalability and performance improvements targeting the compute continuum
  • efficient simulation of large-scale compute continuum systems
  • domain-specific semantics and languages for the Compute Continuum


Programme Committee:

The global information technology ecosystem is currently in transition to a new generation of applications, which require intensive systems of acquisition, processing, and data storage, both at the sensor and the computer level. The new scientific applications, more complex, and the increasing availability of data generated by high resolution scientific instruments in domains as diverse as climate, energy, biomedicine, etc., require the synergies between high performance computing (HPC) and large-scale data analysis (Big Data). Today, the HPC world demands Big Data world techniques, while intensive data analysis requires HPC solutions. However, the tools and cultures of HPC and Big Data have diverged because HPC has traditionally focused on strongly coupled intensive computing problems, while Big Data has been geared towards data analysis in highly scalable applications.


The overall goal of this workshop is to create a scientific discussion forum to exchange techniques and experiences to improve the integration of the HPC and Big Data paradigms, providing a convenient way to create software and adapt existing hardware and software intensive in computing and data on an HPC platform.  Thus, this workshop aims at bringing together developers of IoT/edge/Fog/HPC applications with researchers in the field of distributed IT systems. It addresses researchers who are already employing distributed infrastructure techniques in IoT applications, as well as computer scientists working on the field of distributed systems interested in bringing new developments into the Big Data convergence area. 

The workshop will provide the opportunity to assess technology roadmaps to support IoT data collection, Data Analytics, and HPC at scale, and to share users’ experiences.

A sample of the interest of our proposal is the existence in Europe of a working group for the convergence between HPC and Big Data supported by ETP4HPC and BDVA, led by Prof. María S. Pérez and with the cooperation of several research groups in this proposal. In addition, Prof. Jesús Carretero collaborates in the preparation of the strategic research agenda of the European platform ETP4HPC in the line of data-intensive applications and Dr. Rafael Mayo-García coordinates the European Energy Research Alliance (EERA) transversal Joint Programme ‘Digitalisation for energy’ where convergence research on HPC and Data Science is developed.


Target audience – why and to whom the workshop is of interest

The workshop addresses an audience with two profiles.

On the one hand, it attracts researchers who are already employing distributed infrastructure techniques to implement IoT/edge/Fog/Cloud/HPC solutions, in particular scientists who are developing data- and compute-intensive Big Data applications that include IoT data, large-scale IoT networks, and deployments, or complex analysis and machine learning pipelines to exploit the data. On the other hand, it attracts computer scientists working in the field of distributed systems interested in bringing new developments into the convergence of Big Data and HPC solutions. 


Topics of interests

Contributions are expected but not restricted to the following topics:

  • Design of architectural frameworks for the integration of HPC and Big Data environments.
  • High Performance Computing Platform for Big Data
  • Architecture modeling and simulation methodologies.
  • Processor, memory, and storage systems architecture.
  • Architecture for emerging technologies including machine learning.
  • IoT/mobile/embedded architecture
  • Exploitation of parallelism at the node level and accelerators.
  • Management and capture of massive data integrating large scale heterogeneous systems and computation in the sensors.
  • Development of global energy efficiency mechanisms at the local and global levels.
  • Energy efficient computing for Big Data
  • Use cases for capturing and modeling sensor data and for processing massive IoT data.
  • Applications in the IoT/Edge/fog ecosystem.
  • Data-driven workflows



Workshop Chairs

Katzalin Olcoz (Universidad Complutense de Madrid),

Katzalin Olcoz is an Associate Professor in the Department of Computer Architecture and System Engineering of the Complutense University of Madrid (Spain) since 2000. Within the computer architecture group of the Complutense University, she has been involved in several projects in the field of computer architecture and design automation from high-level specifications, since 1992. Her current research interests focus on high performance computing, heterogeneous computing, energy efficiency and virtualization. She is Associate Editor of IEEE Trans. on CAD and IEEE Trans. on Emerging Topics in Computing. She has been in the Program Committee of several international conferences such as ICS, PDP, ICCAD, VLSID and ISLPED. 


Jesus Carretero ( University Carlos III of Madrid),                               

Jesus Carretero is a Full Professor of Computer Architecture and Technology at Universidad Carlos III de Madrid (Spain), since 2002.  His research activity is centered on high-performance computing systems, large-scale distributed systems and real-time systems applied to data management with application to biomedicine, image processing and COVID-19 pandemic simulation. He is currently involved in coordinating the EuroHPOC project ADMIRE. He was Action Chair of the IC1305 COST Action “Network for Sustainable Ultrascale Computing Systems (NESUS)”. He organized CCGRID 2017 in Madrid and has been General chair of HPCC 2011, MUE 2012, ISPA 2016. Currently he is applications track vice-chair in Supercomputing conference.  Prof. Carretero is a senior member of the IEEE Computer Society.

Program Committee



Workshop format

We aim at a half-day workshop. 

We plan a combination of oral presentations, short talks about related topics from the main PDP conference, and a closing panel discussion.

We plan to host about 6 talks oral presentations, 20 minutes per talk, and 10 minutes for questions and discussion. Talks selection will be based on the interest of the talk and the relation with the workshop.

In addition to the selected talks, the workshop will also feature a keynote and invited short talks from the main PDP track with the goal of extending the scope of our workshop. 

A final panel discussion will summarize the workshop and propose joint next steps to progress in Big Data–HPC convergence research in Supercomputers and large-scale distributed IT systems.

Attendance estimated is between 10 and 20 participants. 

Publicity Plan

The website will be hosted by the CABAHLA-CM project website ( 

The workshop will be advertised in an open call within the diverse networks of the workshop chairs and program committee, including local and international community networks. Advertisement includes announcements on the community’s, institution’s, personal websites, and email lists. 


This workshop proposal is a result of the work made at the CABAHLA-CM project (, a successful project that brings together four research groups, with vast experience in HPC and data-intensive systems, which has a strong national and international presence.  

This Project has been funded by the Comunidad de Madrid (Madrid Regional government) under the grant (S2018/TCS4423).



More details will be available soon.

Topics of interest include, but are not limited to:



Programme Committee:


Many people worldwide are working together to PDP 2023.

General Chairs:


Financial Chair:


Industrial Chairs:


Program Co-chairs:


Proceedings Co-chairs:


Publicity Chairs:


Local arrangements Co-chairs:

Pre-register now from €430. Join us in Naples on 1-3 March and be part of change

Conference Venue

Location that you'll be looking for

The conference is hosted at Villa Doria d'Angri, a monumental manor part of the Università degli Studi di Napoli "Parthenope".

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Destination From

Destination To


Villa Doria d’Angri

Via Francesco Petrarca 80, Naples, 80123, Italy


The most convenient way to reach our venue is by taxi or car. Bus line C21 connects Mergellina railway station to Villa Doria d’Angri.


Parking for conference attendees is availabele in Villa Doria d’Angri.


If you want to stay near the conference venue then you can’t get any closer than BW Signature Collection Hotel Paradiso Napoli. Check room availability on the hotel website.

Contact us

Local Chair: Raffaele Montella Email: Ph: +390815476672


A huge thanks to all our amazing partners. We couldn’t have a conference without you!

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